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1. general description the tda8596 is a quad bridge tied load (btl) audio power ampli?er with symmetrical inputs, made in bcdmos technology. it contains four independent ampli?er channels in btl con?guration with complementary (pmost/nmost) output stages. temperature warning and output signal clipping diagnosis is possible via the i 2 c-bus and via the diagnostic pins (diag and stb pin). the temperature pre-warning level and clip detection levels can be programmed via the i 2 c-bus. the status of each ampli?er channel (i.e. output offset, load connected or not, short circuit condition at the output pins) can be read out separately. 2. features 2.1 general n operates in legacy mode (non i 2 c-bus) and i 2 c-bus mode (3.3 v and 5 v compliant) n three hardware-programmable i 2 c-bus addresses n drives 4 w or 2 w loads n balanced/symmetrical inputs n speaker fault detection n programmable gain (26 db and 16 db) also available in legacy mode n independent short circuit protection per channel n loss of ground and loss of v p safe (with 300 m w series impedance and a maximum supply decoupling capacitor of 2200 m f) n all outputs are short-circuit proof to ground, supply voltage and across the load n all pins are short circuit proof to ground n temperature-controlled gain reduction to prevent audio holes at high junction temperatures n low battery voltage detection n quali?ed in accordance with aec-q100 2.2 i 2 c-bus mode n dc load detection: open (no load), normal load, line-driver load n ac load (tweeter) detection n detect which load is connected during start-up to allow the system to be con?gured to select the gain accordingly (e.g. line-driver mode or normal mode). n independently selectable soft mute of front (channel 1 and channel 3) and rear channels (channel 2 and channel 4) tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs rev. 02 8 november 2007 product data sheet
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 2 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs n independently programmable gain (26 db and 16 db) of front (channel 1 and channel 3) and rear (channel 2 and channel 4) channels n flexible programmable diagnostic levels: u programmable clip detect: 2 %, 5 % or 10 % u programmable thermal pre-warning n selectable information on the diag or stb pin: u the stb pin can be programmed/multiplexed with second clip detection u clip information of each channel separately can be directed to the diag pin or the stb pin u independent enabling of thermal-, clip- or load fault (short across the load, to v p or to ground) available on the diag pin n offset detection 3. quick reference data 4. ordering information table 1. quick reference data symbol parameter conditions min typ max unit v p supply voltage r l =4 w 8 14.4 18 v i q quiescent current no load - 270 400 ma p o output power r l =4 w ; v p = 14.4 v; maximum power; v i =2v (rms) square wave 37 40 - w r l =4 w ; v p = 14.4 v; thd = 0.5 % 18 20 - w r l =4 w ; v p = 14.4 v; thd = 10 % 23 25 - w r l =2 w ; v p = 14.4 v; maximum power; v i =2v (rms) square wave 58 64 - w thd total harmonic distortion r l =4 w ; f = 1 khz; p o = 1 w to 12 w - 0.01 0.1 % v n(o) noise output voltage ?lter 20 hz to 22 khz; r s = 1 k w normal mode; t amb =25 c to 105 c -4565 m v normal mode; t amb = - 20 c to 25 c - 45 110 m v line driver mode - 22 29 m v table 2. ordering information type number package name description version TDA8596TH hsop36 plastic, heatsink small outline package; 36 leads; low stand-off height sot851-2
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 3 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 5. block diagram fig 1. block diagram 001aaf998 standby/ fast mute i 2 c-bus select diagnostic/ clip detect mute protection/ diagnostic 26 db/ 16 db 33 18 17 22 3 10 sgnd svr adsel sda v p1 v p2 in3 - stb gainsel pgnd1 pgnd3 pgnd4 27 14 in3+ 13 28 26 scl 21 19, 20 34, 35 29 31 16 24 diag out3+ out3 - mute protection/ diagnostic 26 db/ 16 db 4 2 in1 - 6 in1+ 7 out1+ out1 - mute protection/ diagnostic 26 db/ 16 db 25 23 in4 - 12 in4+ 11 out4+ out4 - mute protection/ diagnostic 26 db/ 16 db 30 32 36 in2 - 8 in2+ 9 out2+ out2 - tab pgnd2 tda8596 v p
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 4 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 6. pinning information 6.1 pinning 6.2 pin description fig 2. pin con?guration TDA8596TH diag n.c. out2 - out1 - pgnd2 pgnd1 out2+ tab v p2 v p2 out1+ stb n.c. adsel in1 - svr in1+ sda in2 - out4+ in2+ sgnd in4+ in4 - 001aaf999 36 35 34 33 32 31 30 29 28 27 26 25 11 12 9 10 7 8 in3+ in3 - n.c. scl pgnd3 24 23 22 21 15 16 13 14 v p1 out3 - v p1 out3+ 20 19 17 18 5 6 3 4 1 2 pgnd4 out4 - gainsel table 3. pin description symbol pin description n.c. 1 not connected out1 - 2 channel 1 negative output pgnd1 3 power ground channel 1 out1+ 4 channel 1 positive output n.c. 5 not connected in1 - 6 channel 1 negative input in1+ 7 channel 1 positive input in2 - 8 channel 2 negative input in2+ 9 channel 2 positive input sgnd 10 signal ground in4+ 11 channel 4 positive input in4 - 12 channel 4 negative input in3+ 13 channel 3 positive input in3 - 14 channel 3 negative input n.c. 15 not connected
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 5 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 7. functional description the tda8596 is a quad btl audio power ampli?er with symmetrical inputs, made in bcdmos technology. it contains four independent ampli?er channels in btl con?guration with complementary (pmost/nmost) output stages (see figure 1 ). the status of each ampli?er channel (output offset, connected load, short circuit condition at output pins) can be read out separately via the i 2 c-bus. the tda8596 is protected against overvoltage on the supply pins, short circuits at the output pins, overheating and loss-of-ground or loss-of-v p conditions. the temperature pre-warning level and the clip detection levels can be programmed via the i 2 c-bus. further, the information that will be available on the diagnostic pins (i.e. diag or stb) can be programmed. three different i 2 c-bus addresses can be selected by connecting a resistor to the adsel pin. in case the adsel pin is shorted to ground, the tda8596 operates in legacy mode. in this mode no i 2 c-bus is needed and the stb pin will change from a two level pin (standby mode and operating mode) to a three level pin (standby, mute operating and normal operating mode). pgnd3 16 power ground channel 3 out3 - 17 channel 3 negative output out3+ 18 channel 3 positive output v p1 19 and 20 supply voltage 1 scl 21 i 2 c-bus clock input gainsel 22 gain select input (legacy mode only) out4 - 23 channel 4 negative output pgnd4 24 power ground channel 4 out4+ 25 channel 4 positive output sda 26 i 2 c-bus data input/output svr 27 half supply ?lter capacitor adsel 28 i 2 c-bus address select stb 29 standby (i 2 c-bus mode) or mode pin (legacy mode); programmable second clip indicator out2+ 30 channel 2 positive output pgnd2 31 power ground channel 2 out2 - 32 channel 2 negative output diag 33 diagnostic/clip detection output v p2 34 and 35 supply voltage 2 tab 36 heatsink connection; must be connected to ground table 3. pin description continued symbol pin description
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 6 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 7.1 output stage the output stage of each ampli?er channel consists of two pmos power transistors and two nmos transistors in btl con?guration. the tda8596 is manufactured in a bcdmos process on an isolated substrate silicon on insulator (soi). due to the absence of a doped (bulk) substrate, this process is insensitive to latch-up induced by substrate coupled parasitic paths. 7.2 gain selection the gain of the tda8596 can be programmed at 16 db (line driver mode) or 26 db (normal operating mode). this can be done either in i 2 c-bus mode by means of a bus command or in legacy mode by using the gainsel pin. to allow this, the device must ?rst be put in legacy mode by connecting the adsel pin to ground. in case the gainsel pin is connected to ground the 26 db mode is selected. by leaving the gainsel pin open the 16 db mode is selected. the gainsel pin will be ignored in i 2 c-bus mode. 7.3 distortion (clip-) detection if the output of an ampli?er channel starts clipping to either the supply voltage or to ground the output signal will become distorted. when the total harmonic distortion (thd) per channel exceeds a preselected threshold (2 %, 5 % or 10 %), one of the two diagnostic pins (diag or stb) will be pulled low. the clip information of each channel can be directed separately to one speci?c diagnostic pin. this way, it is possible to distinguish between clipping on the front or rear channels. redirection of temperature and load information to the diagnostic pins can be disabled to allow only the clip information to be present on these pins. in this mode, the temperature and load information is still available but can only be read out through the i 2 c-bus. note: during mute-to-on or on-to-mute transitions, the clip detection may be activated even when no output clipping occurs. 7.4 output protection and short circuit operation when a short circuit to ground, to v p or across the load occurs, the concerning ampli?er channel will switch off. after 16 ms of non-operation it will switch on again. if the short circuit condition is still present the ampli?er channel will again return to 16 ms of non-operation. the 16 ms cycle will reduce the dissipation. the other ampli?er channels (without short circuit condition) will retain functionality. to prevent audible distortion, the ampli?er channel with the short circuit condition can be disabled via the i 2 c-bus. in case the diagnostic pin is selected for load fault information (ib2[d4] = 0), it will be pulled low. via the i 2 c-bus it can be read out which channel is shorted by what type of short circuit (to ground, to v p or across the load). in order to detect a shorted load, a signal should be applied to the inputs of the ampli?er. a shorted load is only detected when the output current level on the related output crosses the de?ned safe operating area (soar) protection threshold.
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 7 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 7.4.1 soar protection the output transistors are protected by a safe operating area (soar) protection. the tda8596 has a two-stage soar protection: ? if the differential output voltage across the load (v o ) is less than 1 v, and the current through the load (i l ) exceeds 4 a, the ampli?er channel will be switched off during 16 ms. to prevent spurious switch-off events (which may occur for instance in case of inductive loads or very high input signals), the fault condition (v o < 1 v and i l > 4 a) must exist for more than 300 m s. ? if the differential output voltage across the load (v o ) is more than 1 v, and the current through the load (i l ) exceeds 8 a, the ampli?er channel will be switched off during 16 ms. 7.4.2 speaker protection to prevent damage of the speaker when one side of the speaker is connected to ground, a missing-current protection is implemented. when the current in the high side power transistor of one ampli?er channel is not equal to the current through the corresponding low side power transistor, a fault condition is assumed and the concerning channel will be switched off. the boundary conditions for the activation of this speaker protection are: ? v o < 1.55 v and i missing > 1 a for 80 m s ? v o > 1.55 v and i missing > 3 a for 80 m s 7.5 standby and mute operation the functionality of the stb pin depends on the mode of operation of the device (i.e. legacy- or i 2 c-bus mode). 7.5.1 i 2 c-bus mode when the stb pin is low (< 1 v), the device is in standby condition. the i 2 c-bus lines will not be loaded and the quiescent current will be low. when the stb pin is switched high (> 2.5 v) the tda8596 switches to operating condition and performs a power-on reset (por). this will cause the diag pin to be pulled low. the tda8596 will start-up when bit d0 of instruction byte ib1 is set. bit d0 will also reset the power-on reset occurred bit (db2[d7]) and releases the diag pin. the soft- and fast-mute functions can be activated by means of i 2 c-bus instructions. the soft mute can be activated independently for the front (1 and 3) and rear (2 and 4) channels, and mutes the audio in 20 ms. the fast mute is activated for all channels simultaneously and mutes the audio in 0.1 ms. releasing the mute will always occur via a soft mute and will take 20 ms. when the stb pin is switched low and the ampli?er is in operating mode, the fast mute will be activated prior to shut-down. this enables the option to fast mute the ampli?er by means of the stb pin in case of, for instance an engine start, thus preventing audible pop noise. 7.5.2 legacy mode (pin adsel connected to ground) in legacy mode, the function of the stb pin changes into a three level (standby, mute and operating) enable pin and the ampli?er will directly start-up when the stb pin is put into mute or normal operating mode. mute operation is controlled through an internal timer
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 8 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs (20 ms) to minimize mute-to-operating pops. when the stb pins directly switched from normal operating to standby mode, the fast mute (mutes in 0.1 ms) will be activated prior to shut-down. 7.6 start-up and shut-down sequence to prevent the ampli?er from producing switch-on and switch-off pop noise, the capacitor on the svr pin is used for smooth start-up and shut-down sequences. larger capacitors will lead to longer (smoother) start-up and shut-down sequences. initially the ampli?er outputs are charged to half supply voltage (hvp) minus 1.4 v in mute condition. this is independent of the i 2 c-bus mute settings in i 2 c-bus mode or the pin stb voltage in legacy mode. the remaining 1.4 v before the outputs reach hvp, is used for mute release in case the i 2 c-bus bits (ib2[d2:d0] = 000) have been programmed to mute-off (or v stb > 6.5 v in legacy mode). in case the i 2 c-bus bits have been programmed to maintain mute condition (ib2[d2:d0] = 111) (or 2.5 v < v stb < 6.5 v in legacy mode) the ampli?er will stay in mute. when the stb pin is switched low (< 1 v), a fast mute is performed prior to discharging the capacitor on pin svr. with a capacitor of 22 m f the device goes into standby mode (low quiescent current) within 1 s after switching stb to low (see also figure 3 and figure 6 ). start-up and shut-down pop noise can be further reduced by activating the low pop mode. when this mode is selected (ib2[d3] = 0), the output voltage rising slope will decrease (resulting in a longer start-up time).
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 9 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs fig 3. start-up and shut-down timing in i 2 c-bus mode t amp_on t d(mute_off) fast mute v p diag db2 bit d7 por ib1 bit d0 start enable 001aad168 stb svr amplifier output t off t wake t d(soft_mute) t d(fast_mute)
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 10 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs fig 4. start-up and shut-down timing with dc load active in i 2 c-bus mode t amp_on t d(mute_off) fast mute v p diag db2 bit d7 por ib1 bit d0 start enable 001aad169 stb svr amplifier output t off t load t wake t d(soft_mute) t d(fast_mute)
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 11 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs fig 5. start-up and shut-down timing with low pop and dc load activated t amp_on t d(mute_off) fast mute v p diag db2 bit d7 por ib1 bit d0 start enable 001aad170 stb svr amplifier output t off t load t wake t d(soft_mute) t d(fast_mute)
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 12 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 7.7 power-on reset and supply voltage spikes if the supply voltage drops below 5 v in i 2 c-bus mode (see figure 8 and 9 ), the content of the i 2 c-bus latches cannot be guaranteed and a power-on reset will be performed. this will cause all latches to be reset, the ampli?er to be switched off and the diag pin to be pulled low, indicating that a power-on reset has occurred (see db2[d7]). when bit ib1[d0] is set, the power-on ?ag is reset, the diag pin is released and the ampli?er will start-up. in legacy mode a supply voltage drop belo w 5 v will switch off the ampli?er without pulling the diag pin low. 7.8 engine start and low voltage operation in steady state, the dc output voltage of an ampli?er channel v o equals half the supply voltage (hvp). this voltage is related to the voltage on the svr pin (refer to figure 7 : v o =v svr - 1.4 v). an external capacitor has been connected to the svr pin to suppress coupling of power supply ripple to the ampli?er outputs. the headroom voltage v hr is de?ned as the difference between the supply voltage v p and the dc output voltage v o , i.e. v hr =v p - v o (refer to figure 7 ). if the supply voltage drops, e.g. during an engine start, the outputs will follow slowly due to the capacitor on pin svr. however, if the headroom voltage v hr drops below the headroom protection threshold of 1.6 v, the headroom protection will be activated to prevent pop noise at the output. this protection will ?rst activate the fast mute and will subsequently discharge the capacitor on pin svr to generate more headroom for the ampli?er (refer to figure 8 and 9 ). fig 6. start-up and shut-down timing in legacy mode t amp_on t d(mute_off) fast mute soft mute v p diag 001aad171 stb on mute standby svr amplifier output t off t d(soft_mute) t d(mute_on) t d(fast_mute)
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 13 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs when the svr capacitor has discharged, the ampli?er will only start-up again when the supply voltage v p increases above the low v p mute threshold, typically 7.5 v. below this threshold, the outputs of the ampli?er remain low. in i 2 c-bus mode, a supply voltage drop below v p(reset) , typically 5 v will result in setting bit db2[d7]. in this condition the ampli?er will wait for an i 2 c-bus command in order to start-up. the tda8596 prevents internally induced output pops during engine start. in order to prevent pops on the output caused by the application (e.g. due to the tuner supply going out of regulation), the stb pin can be pulled low when an engine start is detected. the stb pin will activate the fast mute within 0.1 ms and consequently all disturbances at the ampli?er inputs will be suppressed. (1) headroom voltage v hr =v p - v o . (2) steady state output voltage v o =v svr - 1.4 v. (3) headroom protection threshold = v o + 1.6 v. fig 7. low-headroom protection v (v) t (s) v svr v o (2) headroom protection threshold (3) 1.6 v v hr (1) v p 001aad172 14 8.4 7
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 14 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs (1) headroom protection activated: a) fast mute. b) discharge of svr. (2) low v p mute activated. (3) low v p mute released. fig 8. low v p behavior; legacy and i 2 c-bus modes t (s) v o (v) v hr 14.4 legacy and i 2 c-bus mode 8.8 8.6 7.2 3.5 v p v svr t (start-svroff) t (start-vo(off)) output voltage (1) (2) (3) (3) 001aad173 output voltage
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 15 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 7.9 overvoltage and load dump protection when the supply voltage v p exceeds 22 v, all ampli?er output stages will be switched to high-impedance. the tda8596 is protected against load dump transients up to 50 v. 7.10 thermal pre-warning and thermal protection if the average junction temperature reaches the (i 2 c-bus programmable) pre-warning level, a thermal pre-warning will be generated, which can be read out on the i 2 c-bus. if the tda8596 is programmed to send thermal warning information to the diag pin, the diag pin will be pulled low. the default thermal pre-warning detection level (ib3[d4] = 0) is 145 c typical. in case ib3[d4] = 1, the detection level is modi?ed to 122 c typical. in legacy mode the thermal pre-warning level is ?xed at 145 c typical. if the junction temperature increases further, the temperature controlled gain reduction will be activated for all four channels to reduce the output power (see figure 10 ). if this still does not reduce the average junction temperature, all channels will be switched off at the absolute maximum temperature t off , typical 175 c. (1) low v p mute activated. (2) v por : v p level at which por is activated. fig 9. low v p behavior; i 2 c-bus mode only 14.4 8.8 8.6 7.2 3.5 0 v p v svr output voltage diag por ib1 bit d0 5.0 001aad185 v o (v) i 2 c-bus mode only (1) (2) t (s)
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 16 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 7.11 diagnostics diagnostic information can be read via the i 2 c-bus and it can also be made available on the diag pin or stb pin. the information on the diag pin is partly ?xed, i.e. power-on reset occurred and low or high battery events. through i 2 c-bus commands selectable information (i.e. load faults, temperature alarms and clip detection) can be made available. this information will be directed to the diag pin through a logical or function. in case of any of the above mentioned failures, the diag pin will remain low so the microcontroller is triggered to read out the failure information via the i 2 c-bus (the diag pin can be used as microcontroller interrupt to minimize i 2 c-bus traf?c). as soon as the failure is removed, the diag pin will be released. the stb pin can be con?gured as a second clip detection pin. the clip detection level is equal for all channels. it is possible to redirect the clip information of all separate channels to each of the two diagnostic pins diag or stb. this option can be used to distinguish between for instance clipping on the front and rear side channels (i.e. by redirecting the front channels to one diagnostic output and the rear channels to the second diagnostic output). t ab le 4 shows the diagnostic options for the diag pin and stb pin for both i 2 c-bus and legacy mode: fig 10. temperature controlled ampli?er gain t j ( c) 145 175 165 155 001aad174 10 20 30 g v (db) 0 table 4. diagnostic information per pin for various modes diagnostic information i 2 c-bus mode legacy mode pin diag pin stb pin diag power-on reset after power-on reset; pin diag will remain low until ampli?er has been started no no low battery yes no yes clip detection can be enabled per channel can be enabled per channel yes; ?xed level for all channels on 2 %
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 17 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 7.12 offset detection offset detection can be performed either with or without input signal (for instance when the dsp is in mute after a start-up). assume the ampli?er is in i 2 c-bus mode. when an i 2 c-bus read of the output offset is performed the dbx[d2] latch will be set. when the ampli?er btl output voltage crosses the 1.55 v window threshold within 1 s after a read is performed, the dbx[d2] latch is reset and setting is disabled. after a certain delay, the next read can be performed. example: in case the offset bits are still set when a successive read is performed more than 1 s after the previous read, the output signal has not been within the offset window thresholds for at least 1 s. this could either indicate an output signal with a frequency below 1 hz or the presence of an output offset above 1.55 v (see figure 11 ). temperature pre- warning can be enabled no yes; pre-warning level is 145 c short can be enabled no yes speaker protection (missing current) can be enabled no yes offset detection no no no load detection no no no overvoltage yes no yes table 4. diagnostic information per pin for various modes continued diagnostic information i 2 c-bus mode legacy mode pin diag pin stb pin diag fig 11. offset detection 001aad175 reset: setting disabled offset threshold v o = v out+ - v out - v o = v out+ - v out - i 2 c-bus mode only offset threshold t = 1 s: read = no offset db1 bit d2 reset t = 1 s: read = offset db1 bit d2 set read = set bit t t
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 18 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 7.13 dc load detection when the dc load detection is enabled (ib1[d1] = 1), a dc offset is slowly applied at the outputs of the ampli?ers during the start-up sequence (see figure 4 and figure 5 ) and the load currents as a result of the applied offset are measured. based on this measurement the load impedance can be determined to differentiate between normal, line driver and no load (see figure 12 ). when the ampli?er is used in line driver mode and the external booster has an input impedance between 100 w and 800 w (dc-coupled), the dc load bits will be set at dbx[d5:d4] = 10 independent of the selected gain setting (see t ab le 5 ). [1] only when ib1[d2] = 0. by reading the i 2 c-bus bits the microprocessor can determine after the start-up of the ampli?er whether a speaker or an external booster is connected and initiate the proper selection of the ampli?er gain, i.e. 26 db for normal mode or 16 db for line driver mode. gain selection will occur without audible pop noise when the ampli?er is in mute. the dc load bit dbx[d4] is shared with the ac load detection. this implies that t ab le 5 is only valid when ac load detection is disabled (ib1[d2] = 0). when the ac load detection is enabled (ib1[d2] = 1) the bits dbx[d4] will show the result of the ac load detection. after disabling the ac load detection data bit dbx[d4] will show the result of the dc load measurement, which was stored during the ac load measurement. 7.14 ac load detection when ac load detection is enabled (ib1[d2] = 1), ac coupled speakers (e.g. tweeters) can be detected during the assembly process. the detection is performed by means of applying an audible input sine wave (e.g. 19 khz) to the inputs of the ampli?er. the ac current into the load is measured with a 460 ma peak current detector to detect the presence of an ac load. in order to prevent spurious ac load detection (e.g. due to ampli?er on/off switching), the ac load detection bit will only be set when the peak current threshold is triggered at least three times. besides the 460 ma peak current threshold, a secondary threshold level at 230 ma is present. in case this level is not triggered, a high ohmic dc load (e.g. line driver) is assumed (also refer to figure 13 ). fig 12. dc load detection levels table 5. dc load detection translation table dc load bits load indication [1] dbx[d5] dbx[d4] 0 0 normal load 1 0 line driver load 1 1 open load 0 1 not valid 001aad176 20 w 800 w 100 w 5 k w load detection level normal line driver mode open-circuit
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 19 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs example: at an ac output voltage of 2 v peak the total impedance must be less than 4 w to detect an ac coupled load or above 9 w to guarantee the detection of a dc load. refer to t ab le 6 for the interpretation ac load detection bits. the ac load detection can only be performed when the ampli?er has completed its start-up sequence. consequently it will not con?ict with the dc load detection. 7.15 i 2 c-bus diagnostic bits read out the diagnostic information of the ampli?er can be read out via the i 2 c-bus. the i 2 c-bus data bits are set in case a failure event occurs and are not reset until an i 2 c-bus read command is given. this implies that even when the failure mode is removed before reading out the i 2 c-bus, the microcontroller will still be able to read out what kind of failure has occurred. a consequence of this procedure is that during the i 2 c-bus read cycle old information is read. when actual information is required, it is recommended to perform two successive read actions. the diag pin will give actual diagnostic information (when selected), however it does not distinguish between the various failure modes. the diag pin can be used to trigger an i 2 c-bus read out of the data bits to retrieve actual diagnostic information. when a failure is no longer present, the diag pin will be released instantly, independently of the i 2 c-bus latches. table 6. ac load detection translation table normal dc load bit dbx[d5] line driver dc load bit dbx[d4] load indication dont care 0 no ac load detected dont care 1 ac load detected (1) i om < 230 ma (no load detection level). (2) i om > 460 ma (load detection level). fig 13. ac load impedance versus output signal v om (v) 0 5 4 23 1 001aad177 8 12 4 16 20 |z th(load) | ( w ) 0 (1) (2)
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 20 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 8. i 2 c-bus speci?cation table 7. tda8596 address with hardware address select pin adsel a6 a5 a4 a3 a2 a1 a0 r/w open 1 1 011000 = wr ite to tda8596 1 = read from tda8596 51 k w to ground 1 1 011010 = wr ite to tda8596 1 = read from tda8596 10 k w to ground 1 1 011110 = wr ite to tda8596 1 = read from tda8596 ground no i 2 c-bus; legacy mode fig 14. start and stop conditions fig 15. bit transfer mba608 sda scl p stop condition sda scl s start condition mba607 data line stable; data valid change of data allowed sda scl
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 21 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 8.1 instruction bytes i 2 c-bus mode: ? if r/ w bit = 0, the tda8596 expects 3 instruction bytes: ib1, ib2 and ib3 ? after a power-on reset, all instruction bits are set to logic 0 legacy mode: ? the settings are equal to the condition with all instruction bits set to logic 0 (see t ab le 8 ), with the exception of ib1[d0] bit that is ignored in legacy mode. fig 16. i 2 c-bus read and write modes 001aac649 ack msb - 1 msb - 1 msb msb lsb + 1 lsb lsb + 1 12 78912 789 12 78912 789 : generated by master (microcontroller) to stop the transfer, after the last acknowledge (a) a stop condition (p) must be generated to stop the transfer, the last byte must not be acknowledged and a stop condition (p) must be generated : generated by slave : start : stop : acknowledge : read / write s p a r/w : not acknowledge na scl sda scl sda ack ack msb msb - 1 msb msb - 1 lsb + 1 lsb lsb + 1 ack s a a ap na p address write data read data w s address r i 2 c-bus write i 2 c-bus read table 8. instruction byte ib1 bit description d7 dont care d6 channel 3 clip information on diag or stb pin 0 = clip information on diag pin 1 = clip information on stb pin d5 channel 1 clip information on diag or stb pin 0 = clip information on diag pin 1 = clip information on stb pin
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 22 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs d4 channel 4 clip information on diag or stb pin 0 = clip information on diag pin 1 = clip information on stb pin d3 channel 2 clip information on diag or stb pin 0 = clip information on diag pin 1 = clip information on stb pin d2 ac load detection enable 0 = ac load detection disabled 1 = ac load detection enabled; dbx[d4] bits not available for dc load detection d1 dc load detection enable 0 = dc load detection disabled 1 = dc load will be detected d0 ampli?er start enable; (clear power-on reset ?ag, db2[d7]) 0 = ampli?er not enabled, diag pin will remain low 1 = ampli?er will start-up, power-on occurred (db2[d7]) will be reset and diag pin will be released table 9. instruction byte ib2 bit description d7 and d6 clip detection level 00 = clip detection level 2 % 01 = clip detection level 5 % 10 = clip detection level 10 % 11 = clip detection level disabled d5 temperature information on diag pin 0 = temperature information on diag pin 1 = no temperature information on diag pin d4 load fault information (shorts, missing current) on diag pin 0 = fault information on diag pin 1 = no fault information on diag pin d3 low pop (slow start) enable 0 = low pop enabled 1 = low pop disabled d2 soft mute channel 1 and channel 3 (mute delay 20 ms) 0 = no mute 1 = mute d1 soft mute channel 2 and channel 4 (mute delay 20 ms) 0 = no mute 1 = mute table 8. instruction byte ib1 continued bit description
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 23 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 8.2 data bytes i 2 c-bus mode: ? if r/ w = 1, the tda8596 will send four data bytes to the microprocessor: db1, db2, db3, and db4 ? all bits are latched ? all bits are reset after a read operation except d4 and d5. d2 is set after a read operation, refer to the offset detection described in section 7.12 ? for explanation of ac and dc load detection bits, refer to section 7.13 and section 7.14 d0 fast mute all ampli?er channels (mute delay 100 m s) 0 = no mute 1 = mute table 10. instruction byte ib3 bit description d7 dont care d6 ampli?er channel 1 and channel 3 gain select 0 = 26 db 1 = 16 db d5 ampli?er channel 2 and channel 4 gain select 0 = 26 db 1 = 16 db d4 temperature pre-warning level 0 = warning level on 145 c 1 = warning level on 122 c d3 disable channel 3 0 = channel 3 enabled 1 = channel 3 disabled d2 disable channel 1 0 = channel 1 enabled 1 = channel 1 disabled d1 disable channel 4 0 = channel 4 enabled 1 = channel 4 disabled d0 disable channel 2 0 = channel 2 enabled 1 = channel 2 disabled table 9. instruction byte ib2 continued bit description
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 24 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs table 11. data byte db1 bit description d7 temperature pre-warning 0 = no warning 1 = junction temperature too high d6 speaker fault channel 2 (missing current) 0 = no missing current 1 = missing current d5 and d4 channel 2 dc load or ac load detection if bit ib1[d2] = 1, ac load detection is enabled, bit d5 and bit d4 are available for ac load detection 00 = no ac load 01 = ac load detected 10 = no ac load 11 = ac load detected if bit ib1[d2] = 0, dc load detection is enabled, bits d5 and bit d4 are available for dc load detection 00 = normal load 01 = not valid 10 = line driver load 11 = open load d3 channel 2 shorted load 0 = not shorted load 1 = shorted load d2 channel 2 output offset 0 = no output offset 1 = output offset d1 channel 2 short to v p 0 = no short to v p 1 = short to v p d0 channel 2 short to ground 0 = no short to ground 1 = short to ground table 12. data byte db2 bit description d7 power-on reset occurred/ampli?er status 0 = ampli?er on 1 = power-on reset has occurred; ampli?er off d6 speaker fault channel 4 (missing current) 0 = no missing current 1 = missing current
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 25 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs d5 and d4 channel 4 dc load or ac load detection if bit ib1[d2] = 1, ac load detection is enabled, bit d5 and bit d4 are available for ac load detection 00 = no ac load 01 = ac load detected 10 = no ac load 11 = ac load detected if bit ib1[d2] = 0, dc load detection is enabled, bits d5 and bit d4 are available for dc load detection 00 = normal load 01 = not valid 10 = line driver load 11 = open load d3 channel 4 shorted load 0 = not shorted load 1 = shorted load d2 channel 4 output offset 0 = no output offset 1 = output offset d1 channel 4 short to v p 0 = no short to v p 1 = short to v p d0 channel 4 short to ground 0 = no short to ground 1 = short to ground table 13. data byte db3 bit description d7 maximum temperature protection 0 = no protection 1 = maximum temperature protection d6 speaker fault channel 1 (missing current) 0 = no missing current 1 = missing current table 12. data byte db2 continued bit description
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 26 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs d5 and d4 channel 1 dc load or ac load detection if bit ib1[d2] = 1, ac load detection is enabled, bit d5 and bit d4 are available for ac load detection 00 = no ac load 01 = ac load detected 10 = no ac load 11 = ac load detected if bit ib1[d2] = 0, dc load detection is enabled, bits d5 and bit d4 are available for dc load detection 00 = normal load 01 = not valid 10 = line driver load 11 = open load d3 channel 1 shorted load 0 = not shorted load 1 = shorted load d2 channel 1 output offset 0 = no output offset 1 = output offset d1 channel 1 short to v p 0 = no short to v p 1 = short to v p d0 channel 1 short to ground 0 = no short to ground 1 = short to ground table 14. data byte db4 bit description d7 reserved d6 speaker fault channel 3 (missing current) 0 = no missing current 1 = missing current table 13. data byte db3 continued bit description
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 27 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 9. limiting values d5 and d4 channel 3 dc load or ac load detection if bit ib1[d2] = 1, ac load detection is enabled, bit d5 and bit d4 are available for ac load detection 00 = no ac load 01 = ac load detected 10 = no ac load 11 = ac load detected if bit ib1[d2] = 0, dc load detection is enabled, bits d5 and bit d4 are available for dc load detection 00 = normal load 01 = not valid 10 = line driver load 11 = open load d3 channel 3 shorted load 0 = not shorted load 1 = shorted load d2 channel 3 output offset 0 = no output offset 1 = output offset d1 channel 3 short to v p 0 = no short to v p 1 = short to v p d0 channel 3 short to ground 0 = no short to ground 1 = short to ground table 14. data byte db4 continued bit description table 15. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v p supply voltage operating - 18 v non operating - 1 +50 v load dump protection; duration 50 ms; rise time > 2.5 ms -50v v p(r) reverse supply voltage 10 minutes maximum - - 2v i osm non-repetitive peak output current -13a i orm repetitive peak output current repetitive - 8 a t j junction temperature - 150 c t stg storage temperature - 55 +150 c
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 28 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs [1] 10 k w series resistance if connected to v p . 10. thermal characteristics 11. characteristics t amb ambient temperature - 40 +105 c v (prot) protection voltage ac and dc short circuit voltage of output pins and across the load -v p v v x voltage on pin x scl and sda 0 6.5 v inputs, svr and diag 0 13 v stb [1] 024v p tot total power dissipation t case = 70 c - 80 w v esd electrostatic discharge voltage human body model; c = 100 pf; r s = 1.5 k w - 2000 v machine model; c = 200 pf; r s = 10 w ; l = 0.75 m h - 200 v table 15. limiting values continued in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit table 16. thermal characteristics symbol parameter conditions typ unit r th(j-c) thermal resistance from junction to case 1 k/w r th(j-a) thermal resistance from junction to ambient 35 k/w table 17. characteristics refer to test circuit (see figure 29 ) at v p = 14.4 v; r l =4 w ; f = 1 khz; r s =0 w ; normal mode; unless otherwise speci?ed. tested at t amb =25 c; guaranteed for t amb = - 40 c to +105 c. symbol parameter conditions min typ max unit supply voltage behavior v p supply voltage r l = 4 w 8 14.4 18 v r l = 2 w [1] 8 14.4 16 v i q quiescent current no load - 270 400 ma i stb standby current v stb = 0.4 v - 4 15 m a v o output voltage 6.7 7 7.2 v v p(low)(mute) low supply voltage mute with rising supply voltage 6.9 7.5 8 v with falling supply voltage 6.3 6.8 7.4 v d v p(low)(mute) low supply voltage mute hysteresis 0.1 0.7 1 v v th(ovp) overvoltage protection threshold voltage 18 20 22 v v hr headroom voltage when headroom protection is activated; see figure 7 1.1 1.6 2.0 v
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 29 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs v por power-on reset voltage see figure 9 4.1 5.0 5.8 v v o(offset) output offset voltage ampli?er on - 95 0 +95 mv ampli?er mute - 25 0 +25 mv line driver mode - 40 0 +40 mv mode select pin stb/second clip detection pin v stb voltage on pin stb standby mode i 2 c-bus mode - - 1 v legacy mode (i 2 c-bus off) - - 1 v mute operating mode legacy mode (i 2 c-bus off) 2.5 - 4.5 v operating mode i 2 c-bus mode 2.5 - v p v legacy mode (i 2 c-bus off) 6.5 - v p v low voltage on pin stb when pulled down during clipping [2] i stb = 150 m a 5.6 - 6.1 v i stb = 500 m a 6.1 - 7.4 v i stb current on pin stb 0 v < v stb < 8.5 v clip detection not active; i 2 c-bus mode -430 m a legacy mode - 10 70 m a start-up, shut-down and mute timing t wake wake-up time time after wake-up via stb pin before ?rst i 2 c-bus transmission is recognized; see figure 3 - 300 500 m s i lo(svr) output leakage current on pin svr --10 m a table 17. characteristics continued refer to test circuit (see figure 29 ) at v p = 14.4 v; r l =4 w ; f = 1 khz; r s =0 w ; normal mode; unless otherwise speci?ed. tested at t amb =25 c; guaranteed for t amb = - 40 c to +105 c. symbol parameter conditions min typ max unit
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 30 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs t d(mute_off) mute off delay time mute to 10 % of output signal; i lo(svr) =0 m a i 2 c-bus mode (ib1[d0]); with i lo(svr) =10 m a ? +15 ms; no dc load (ib1[d1] = 0); low pop disabled (ib2[d3] = 1); see figure 3 [3] 295 465 795 ms i 2 c-bus mode (ib1[d0]); with i lo(svr) =10 m a ? +20 ms; dc load active (ib1[d1] = 1); low pop disabled (ib2[d3] = 1); see figure 4 [3] 500 640 940 ms i 2 c-bus mode (ib1[d0]); with i lo(svr) =10 m a ? +20 ms; dc load active (ib1[d1] = 0); low pop enabled (ib2[d3] = 0); see figure 5 [3] 640 830 1190 ms legacy mode; with i lo(svr) =10 m a ? +20 ms; v stb =7v; r adsel =0 w ; see figure 6 [3] 430 650 1030 ms t amp_on ampli?er on time ampli?er from mute to 90 % of output signal; i lo(svr) =0 m a i 2 c-bus mode (ib1[d0]); with i lo(svr) =10 m a ? +30 ms; no dc load (ib1[d1] = 0); low pop disabled (ib2[d3] = 1); see figure 3 [3] 360 520 870 ms i 2 c-bus mode (ib1[d0]); with i lo(svr) =10 m a ? +35 ms; dc load active (ib1[d1] = 1); low pop disabled (ib2[d3] = 1); see figure 4 [3] 565 695 1015 ms i 2 c-bus mode (ib1[d0]); with i lo(svr) =10 m a ? +30 ms; dc load active (ib1[d1] = 0); low pop enabled (ib2[d3] = 0); see figure 5 [3] 710 890 1270 ms legacy mode; with i lo(svr) =10 m a ? +20 ms; v stb =7v; r adsel =0 w ; see figure 6 [3] 510 720 1120 ms t off ampli?er switch-off time time to dc output voltage < 0.1 v; i 2 c-bus mode (ib1[d0]); i lo(svr) =0 m a with i lo(svr) =10 m a ? +0 ms; low pop enabled (ib2[d3] = 0); see figure 4 [3] 120 245 530 ms with i lo(svr) =10 m a ? +0 ms; low pop disabled (ib2[d3] = 1); see figure 5 [3] 140 280 620 ms t d(mute-on) mute to on delay time from 10 % to 90 % of output signal; ib2[d1] = 1 to 0; v i = 50 mv; see figure 6 - 2040ms t d(soft_mute) soft mute delay time from 10 % to 90 % of output signal; ib2[d1] = 0 to 1; v i = 50 mv; see figure 6 - 2040ms table 17. characteristics continued refer to test circuit (see figure 29 ) at v p = 14.4 v; r l =4 w ; f = 1 khz; r s =0 w ; normal mode; unless otherwise speci?ed. tested at t amb =25 c; guaranteed for t amb = - 40 c to +105 c. symbol parameter conditions min typ max unit
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 31 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs t d(fast_mute) fast mute delay time from 10 % to 90 % of output signal; v stb from 8 v to 1.3 v; v i = 50 mv; see figure 6 - 0.1 1 ms t (start-vo(off)) engine start to output off time v p from 14.4 v to 7 v; v o < 0.5 v; see figure 8 - 0.1 1 ms t (start-svroff) engine start to svr off time v p from 14.4 v to 7 v; v svr < 2 v; see figure 8 - 4075ms i 2 c-bus interface [4] v il low-level input voltage pins scl and sda - - 1.5 v v ih high-level input voltage pins scl and sda 2.3 - 5.5 v v ol low-level output voltage pin sda; i l = 5 ma - - 0.4 v f scl scl clock frequency - 400 - khz r adsel resistance on pin adsel i 2 c-bus address a[6:0] = 110 1100 155 - - k w i 2 c-bus address a[6:0] = 110 1101 42 51 57 k w i 2 c-bus address a[6:0] = 110 1111 7 10 15 k w legacy mode - - 0.5 k w gain select pin r gainsel resistance on pin gainsel legacy mode (i 2 c-bus off) 26 db gain; normal mode - - 5 k w 16 db gain; line driver mode 20 - - k w diagnostic v ol(diag) low-level output voltage on pin diag fault condition; i diag = 1 ma - - 0.3 v v o(offset_det) output voltage at offset detection 1.3 1.55 2.0 v thd clip total harmonic distortion clip detection level v p > 10 v ib2[d7:d6] = 10; level 10 % 5 10 16 % ib2[d7:d6] = 01; level 5 % 357% ib2[d7:d6] = 00; level 2 % 123% d thd clip total harmonic distortion clip detection level variation between ib2[d7:d6] = 10 and ib2[d7:d6] = 01 (level between 10 % and 5 %) 148% between ib2[d7:d6] = 01 and ib2[d7:d6] = 00 (level between 5 % and 2%) 1 3.5 6 % t j(av)(pwarn) pre-warning average junction temperature ib3[d4] = 0 135 145 155 c ib3[d4] = 1 112 122 132 c t j(av)(g( - 0.5db)) average junction temperature for 0.5 db gain reduction v i = 0.05 v 150 155 160 c table 17. characteristics continued refer to test circuit (see figure 29 ) at v p = 14.4 v; r l =4 w ; f = 1 khz; r s =0 w ; normal mode; unless otherwise speci?ed. tested at t amb =25 c; guaranteed for t amb = - 40 c to +105 c. symbol parameter conditions min typ max unit
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 32 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs d t j(pw-g( - 0.5db)) prewarning to 0.5 db gain reduction junction temperature difference 71013 c d t j(g( - 0.5db)-of) junction temperature difference between 0.5 db gain reduction and off 10 15 20 c d g (th_fold) gain reduction of thermal foldback -20-db z th(load) load detection threshold impedance i 2 c-bus mode normal load detection - - 20 w line driver load detection 100 - 800 w z th(open) open load detection threshold impedance i 2 c-bus mode 5000 - - w i th(o)det(load)ac ac load detection output threshold current i 2 c-bus mode ac load bit is set 460 - - ma ac load bit is not set - - 230 ma ampli?er p o output power r l =4 w ; v p = 14.4 v; thd = 0.5 % 18 20 - w r l =4 w ; v p = 14.4 v; thd = 10 % 23 25 - w r l =4 w ;v p = 14.4 v; maximum power; v i = 2 v (rms) square wave 37 40 - w r l =4 w ;v p = 15.2 v; maximum power; v i = 2 v (rms) square wave 41 45 - w r l =2 w ; v p = 14.4 v; thd = 0.5 % 29 32 - w r l =2 w ; v p = 14.4 v; thd = 10 % 37 41 - w r l =2 w ;v p = 14.4 v; maximum power; v i = 2 v (rms) square wave 58 64 - w thd total harmonic distortion p o = 1 w to 12 w; f = 1 khz; r l =4 w - 0.01 0.1 % p o = 1 w to 12 w; f = 10 khz - 0.09 0.3 % p o = 1 w to 12 w; f = 20 khz - 0.14 0.4 % line driver mode; v o = 1 v (rms) and 5 v (rms); f = 20 hz to 20 khz - 0.02 0.05 % a cs channel separation f = 1 khz; r s = 1 k w 65 80 - db f = 10 khz; r s = 1 k w 60 65 - db psrr power supply rejection ratio f = 100 hz to 10 khz; r s = 1 k w 55 70 - db cmrr common mode rejection ratio normal mode; v cm = 0.3 v (p-p); f = 1 khz to 3 khz; r s =1k w 45 65 - db v cm(max)(rms) maximum common mode voltage (rms value) f = 1 khz - - 0.6 v table 17. characteristics continued refer to test circuit (see figure 29 ) at v p = 14.4 v; r l =4 w ; f = 1 khz; r s =0 w ; normal mode; unless otherwise speci?ed. tested at t amb =25 c; guaranteed for t amb = - 40 c to +105 c. symbol parameter conditions min typ max unit
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 33 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs [1] operation above 16 v with a 2 w reactive load can trigger the ampli?er protection. the ampli?er switches off and will restart after 16 ms resulting in an audio hole. [2] v stb depends on the current into the stb pin: minimum = (1429 i stb ) + 5.4 v, maximum = (3143 i stb ) + 5.6 v. [3] the times are speci?ed without a leakage current. for a leakage current of 10 m a on the svr pin, the delta time is speci?ed. if the capacitor value on the svr pin changes with 30 %, the speci?ed time will also change with 30 %. the speci?ed time includes an esr of the capacitor on the svr pin of up to 15 w . [4] standard i 2 c-bus spec: maximum low level = 0.3 v dd , minimum high-level = 0.7 v dd . to comply with 5 v and 3.3 v logic the maximum low level is de?ned with v dd = 5 v and the minimum high-level with v dd = 3.3 v. [5] r i is the total differential input resistance. f - 3db cut-off frequency is de?ned as assuming worst-case low input resistance and 20 % spread in c i . v n(o) noise output voltage ?lter 20 hz to 22 khz; r s = 1 k w mute mode - 19 26 m v line driver mode - 22 29 m v normal mode; t amb =25 c to 105 c - 45 65 m v normal mode; t amb = - 20 c to 25 c - 45 110 m v g v voltage gain differential in; differential out normal mode 25.5 26 26.5 db line driver mode 15.5 16 16.5 db r i input resistance symmetrical input; c i = 470 nf; see figure 29 [5] 44 60 100 k w a mute mute attenuation v o / v o(mute) ; v i = 50 mv 80 92 - db v o(mute)(rms) rms mute output voltage v i = 1 v (rms); ?lter 20 hz to 22 khz - 25 - m v b p power bandwidth - 1 db - 20 to 20000 -hz table 17. characteristics continued refer to test circuit (see figure 29 ) at v p = 14.4 v; r l =4 w ; f = 1 khz; r s =0 w ; normal mode; unless otherwise speci?ed. tested at t amb =25 c; guaranteed for t amb = - 40 c to +105 c. symbol parameter conditions min typ max unit 1 2 p r i c i 2 ------------------------------------ - 1 2 p 44 k w 235 nf 0.8 ------------------------------------------------------------------ - 19 hz ==
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 34 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 12. performance diagrams v p = 14.4 v. (1) f = 10 khz. (2) f = 1 khz. (3) f = 100 hz. fig 17. total harmonic distortion as a function of output power; 4 w load v p = 14.4 v. (1) f = 10 khz. (2) f = 1 khz. (3) f = 100 hz. fig 18. total harmonic distortion as a function of output power; 2 w load 001aad139 10 - 1 10 - 2 10 1 10 2 thd (%) 10 - 3 p o (w) 10 - 2 10 2 10 10 - 1 1 (1) (2) (3) 001aad140 10 - 1 10 - 2 10 1 10 2 thd (%) 10 - 3 p o (w) 10 - 2 10 2 10 10 - 1 1 (1) (2) (3)
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 35 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs v p = 14.4 v. (1) thd = 10 %. (2) thd = 0.5 %. fig 19. output power as a function of frequency; 4 w load v p = 14.4 v. (1) thd = 10 %. (2) thd = 0.5 %. fig 20. output power as a function of frequency; 2 w load 001aad141 f (khz) 10 - 2 10 2 10 10 - 1 1 22 24 20 26 28 p o (w) 18 (1) (2) 001aad142 f (khz) 10 - 2 10 2 10 10 - 1 1 45 35 55 p o (w) 25 (1) (2)
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 36 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs f = 1 khz. (1) p o(max) . (2) thd = 10 %. (3) thd = 0.5 %. fig 21. output power as a function of supply voltage; 4 w load f = 1 khz. (1) p o(max) . (2) thd = 10 %. (3) thd = 0.5 %. fig 22. output power as a function of supply voltage; 2 w load 001aad143 v p (v) 5 20 15 10 20 40 60 p o (w) 0 (1) (2) (3) v p (v) 5 20 15 10 001aad144 40 60 20 80 100 p o (w) 0 (1) (2) (3)
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 37 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs v p = 14.4 v; r l =4 w . (1) p o =1w. (2) p o =10w. fig 23. total harmonic distortion as a function of frequency; normal mode v p = 14.4 v; r l = 600 w . (1) v o = 5 v; front channel. (2) v o =1v. (3) v o = 5 v; rear channel. fig 24. total harmonic distortion as a function of frequency; line driver mode 001aad145 f (khz) 10 - 2 10 2 10 10 - 1 1 10 - 1 10 - 2 1 thd (%) 10 - 3 (1) (2) 001aag000 f (khz) 10 - 2 10 2 10 10 - 1 1 10 - 2 10 - 1 thd (%) 10 - 3 (3) (2) (1)
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 38 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs v p = 14.4 v; r l =4 w ; v ripple = 2 v (p-p). (1) front channel. (2) rear channel. fig 25. powers supply ripple rejection ratio as a function of frequency v p = 14.4 v; r l =4 w ; p o =4w. fig 26. channel separation as a function of frequency 001aag001 f (hz) 10 10 5 10 4 10 2 10 3 - 70 - 60 - 80 - 50 - 40 psrr (db) - 90 (1) (2) 001aag002 f (hz) 10 10 5 10 4 10 2 10 3 - 80 - 70 - 90 - 60 - 50 a cs (db) - 100
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 39 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs v p = 14.4 v; r l =4 w ; f = 1 khz. fig 27. power dissipation as a function of output power; 4 w load v p = 14.4 v; r l =2 w ; f = 1 khz. fig 28. power dissipation as a function of output power; 2 w load p o (w) 0 40 30 20 10 001aag003 20 30 10 40 50 p tot (w) 0 p o (w) 0 80 60 40 20 001aag004 40 60 20 80 100 p tot (w) 0
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 40 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 13. application information (1) a capacitor of 10 nf may be added between every ampli?er output and ground for emc reasons. (2) the svr capacitor and r adsel resistor should ?rst be connected to sgnd before connecting to pgnd. fig 29. test and application information 001aag005 standby/ fast mute i 2 c-bus select diagnostic/ clip detect mute protection/ diagnostic 26 db/ 16 db 33 18 17 22 3 10 sgnd svr adsel r adsel (2) sda v p1 v p2 in3 - stb 10 k w r i /2 +8.5 v gainsel pgnd1 pgnd3 pgnd4 27 14 in3+ 13 28 26 scl 21 19, 20 34, 35 29 31 16 24 diag out3+ out3 - mute protection/ diagnostic 26 db/ 16 db 4 2 in1 - 6 in1+ 7 out1+ out1 - mute protection/ diagnostic 26 db/ 16 db 25 23 in4 - 12 in4+ 11 out4+ out4 - mute protection/ diagnostic 26 db/ 16 db 30 32 36 in2 - 22 m f (2) 8 in2+ 9 out2+ out2 - tab pgnd2 tda8596 10 k w (1) (1) (1) (1) +5 v r i /2 r i /2 r s / 2 v i / 2 v i / 2 c i r i /2 r i /2 r i /2 r i /2 r i /2 r s / 2 c i r s / 2 v i / 2 v i / 2 c i r s / 2 c i r s / 2 v i / 2 v i / 2 c i r s / 2 c i r s / 2 v i / 2 v cm v i / 2 c i r s / 2 c i 470 nf 470 nf 470 nf 470 nf 470 nf 470 nf 470 nf 470 nf v p
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 41 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs fig 30. circuit for combined stb and clip detection function on pin stb 001aag009 4.7 k w 10 k w 18 k w 8.5 v 5.6 k w stb switch 29 tda8596 3.3 v micro- controller
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 42 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 13.1 pcb schematic and layout fig 31. evaluation board; schematic 001aag006 n.c. tab/gnd pgnd4 pgnd3 v p1 v p2 pgnd2 pgnd1 in1+ v p in1 - 470 nf 220 nf 220 nf 470 nf 1 7 19, 20 34, 35 6 in2+ in2 - 470 nf 470 nf 9 8 in3+ in3 - 470 nf 470 nf 13 sgnd 10 14 in4+ in4 - 470 nf 1 m f 10 m f 10 k w 10 k w 10 k w baw62 2 k w 18 k w dz 8.2 v i 2 c-bus legacy 12 k w 22 k w 4.7 k w bc859 1 2 4 3 51 k w 470 nf 22 m f 2200 m f/ 16 v 11 12 svr on/standby (sw1) mode unmute mute sw2 sw3 27 n.c. 5 n.c. 15 out1+ 4 out1 - 2 out2+ 30 out2 - 32 out3+ 18 out3 - 17 out4+ 25 out4 - gainsel sda scl 23 22 26 21 16 db gain open 26 db gain tda8596 tda3664 1 2 3 4 sda diag i 2 c-bus supply +5v gnd v p scl 1 2 3 4 8 7 6 5 diag 33 clip 2 dip switch address select stb 29 adsel 28 3 31162436
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 43 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs fig 32. evaluation board layout; top view fig 33. evaluation board layout; bottom view sgnd - in1+ vp gnd srk ver. 2 8 x 470 nf c6 2200 m f/16 v c2 d8 nxp semiconductors 001aag007 c5 c8 c7 c11 c12 c9 c15 i2c supply enable 1 m f 10 m f c14 c10 sw2 j5 scl gnd - in2+ +in4 - +in3 - 16 db r6 10 k w 26 db gain +5v sda da de diag address select (00) (01) (11) unmute dz1 i2c 8.2 v mute sw3 on sw1 d1 stby i2c 22 m f svr c13 vp gnd legacy clip2 /stb mode sw5 - out1+ - out2+ TDA8596TH +out4 - sense +out3 - top 001aag008 TDA8596TH c1 220 nf c3 220 nf bottom bc859 id r2 r3 r7 r1 r8 r6 r4 ic1 41 tda3664 r5 10 k w 12 k w 4.7 k w 18 k w 22 k w 51 k w 10 k w 2 k w 118
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 44 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 14. test information 14.1 quality information this product has been quali?ed in accordance with the automotive electronics council (aec) standard q100 - stress test quali?cation for integrated circuits , and is suitable for use in automotive applications.
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 45 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 15. package outline fig 34. package outline sot851-2 (hsop36) references outline version european projection issue date iec jedec jeita sot851-2 sot851-2 04-05-04 hsop36: plastic, heatsink small outline package; 36 leads; low stand-off height b p z 118 36 19 d 1 d 2 e 1 e a h e d e 2 y x e w m pin 1 index va m x q l p detail x (a 3 ) a 2 a 4 c a q 0 5 10 mm scale unit a 4 (1) mm + 0.08 - 0.04 3.5 0.35 dimensions (mm are the original dimensions) notes 1. limits per individual lead. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. a max. a 2 3.5 3.2 d 2 1.1 0.9 h e 14.5 13.9 l p 1.1 0.8 q 1.7 1.5 2.55 2.20 v 0.25 w 0.12 yz 8 0 q 0.07 x 0.03 d 1 13.0 12.6 e 1 6.2 5.8 e 2 2.9 2.5 b p c 0.32 0.23 e 0.65 d (2) 16.0 15.8 e (2) 11.1 10.9 0.38 0.25 a 3
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 46 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 16. abbreviations 17. revision history table 18. abbreviations acronym description bcdmos bipolar cmos/dmos cmos complementary metal-oxide semiconductor dmos double-diffused metal-oxide semiconductor dsp digital signal processor esr equivalent series resistance nmos negative-channel metal-oxide semiconductor nmost negative-channel metal-oxide semiconductor transistor pmos positive-channel metal-oxide semiconductor pmost positive-channel metal-oxide semiconductor transistor soar safe operating area table 19. revision history document id release date data sheet status change notice supersedes tda8596_2 20071108 product data sheet - tda8596_1 modi?cations: ? figure 30 : value of base-emitter resistor changed from 10 k w to 5.6 k w ? section 14 : quality information reference updated tda8596_1 20070705 preliminary data sheet - -
tda8596_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 8 november 2007 47 of 48 nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs 18. legal information 18.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 18.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 18.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 18.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. i 2 c-bus logo is a trademark of nxp b.v. 19. contact information for additional information, please visit: http://www .nxp.com for sales of?ce addresses, send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors tda8596 i 2 c-bus controlled 4 45 w power ampli?er with symmetrical inputs ? nxp b.v. 2007. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 8 november 2007 document identifier: tda8596_2 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 20. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2.1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2.2 i 2 c-bus mode . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 quick reference data . . . . . . . . . . . . . . . . . . . . . 2 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 functional description . . . . . . . . . . . . . . . . . . . 5 7.1 output stage . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.2 gain selection . . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.3 distortion (clip-) detection. . . . . . . . . . . . . . . . . 6 7.4 output protection and short circuit operation . . 6 7.4.1 soar protection. . . . . . . . . . . . . . . . . . . . . . . . 7 7.4.2 speaker protection . . . . . . . . . . . . . . . . . . . . . . 7 7.5 standby and mute operation. . . . . . . . . . . . . . . 7 7.5.1 i 2 c-bus mode . . . . . . . . . . . . . . . . . . . . . . . . . . 7 7.5.2 legacy mode (pin adsel connected to ground) . . . . . . . . . . 7 7.6 start-up and shut-down sequence . . . . . . . . . . 8 7.7 power-on reset and supply voltage spikes . . . 12 7.8 engine start and low voltage operation. . . . . . 12 7.9 overvoltage and load dump protection. . . . . . 15 7.10 thermal pre-warning and thermal protection . 15 7.11 diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7.12 offset detection. . . . . . . . . . . . . . . . . . . . . . . . 17 7.13 dc load detection . . . . . . . . . . . . . . . . . . . . . . 18 7.14 ac load detection . . . . . . . . . . . . . . . . . . . . . . 18 7.15 i 2 c-bus diagnostic bits read out . . . . . . . . . . . 19 8i 2 c-bus speci?cation . . . . . . . . . . . . . . . . . . . . 20 8.1 instruction bytes . . . . . . . . . . . . . . . . . . . . . . . 21 8.2 data bytes. . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 9 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 27 10 thermal characteristics. . . . . . . . . . . . . . . . . . 28 11 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 28 12 performance diagrams . . . . . . . . . . . . . . . . . . 34 13 application information. . . . . . . . . . . . . . . . . . 40 13.1 pcb schematic and layout . . . . . . . . . . . . . . . 42 14 test information . . . . . . . . . . . . . . . . . . . . . . . . 44 14.1 quality information . . . . . . . . . . . . . . . . . . . . . 44 15 package outline . . . . . . . . . . . . . . . . . . . . . . . . 45 16 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 46 17 revision history . . . . . . . . . . . . . . . . . . . . . . . . 46 18 legal information . . . . . . . . . . . . . . . . . . . . . . 47 18.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 47 18.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 18.3 disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 47 18.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 47 19 contact information . . . . . . . . . . . . . . . . . . . . 47 20 contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

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